An impedance characteristic in a region of a frequency higher than that of the conventional art has been demanded to be improved also in a capacitor as one of electronic devices as the frequency of the electronic devices has been increased. In order to respond to such demand, various solid electrolytic capacitors have been studied that employ a conductive polymer of high electric conductivity as a solid electrolyte.
Recently, a solid electrolytic capacitor used in a periphery of the central processing unit (CPU) of a personal computer or the like has been strongly demanded to be downsized and have large capacitance. Not only low equivalent series resistance (low ESR) responding to frequency increase, but also low equivalent series inductance (low ESL) excellent in noise reducing property and transient responsiveness has been strongly demanded. Also in order to respond to such demand, various studies have been performed.
FIG. 12A through FIG. 12D are a plan sectional view, a front sectional view, a bottom sectional view, and a bottom view showing a structure of a conventional chip-type solid electrolytic capacitor that has been proposed by the present inventors, respectively. This chip-type solid electrolytic capacitor has a plurality of solid electrolytic capacitor elements (hereinafter referred to as “elements”) 21, positive electrode lead frames 25, negative electrode lead frame 26, positive electrode common terminals 27, negative electrode common terminal 28, and covering resin 29.
Each element 21 is produced using a positive electrode body made of valve action metal. First, the surface of the positive electrode body is roughened and a dielectric oxide film layer is formed thereon. Next, an insulated section (not shown) is disposed at a predetermined position of the positive electrode body to divide the positive electrode body into positive electrode section 22 and a negative electrode forming section (not shown). A solid electrolyte layer made of a conductive polymer and a negative electrode layer formed of a carbon layer and a silver paste layer are sequentially formed on the dielectric oxide film layer of the negative electrode forming section (all of them are not shown) in a stacking manner in this order. Thus, negative electrode section 23 is formed. In the above-mentioned procedure, element 21 is produced.
Laminated body 24 is structured by stacking elements 21 so that positive electrode sections 22 of elements 21 are arranged alternately in the opposite directions.
Positive electrode lead frame 25 integrally joins positive electrode sections 22 of laminated body 24 to each other. Positive electrode binding section 25A is integrally disposed in positive electrode lead frame 25. Positive electrode binding section 25A is folded so as to cover positive electrode section 22 of each element 21 along the outer periphery of positive electrode section 22. Then, positive electrode binding section 25A and positive electrode sections 22 are integrally joined to each other by laser welding or the like at welding sections 25B. Similarly, negative electrode lead frame 26 integrally joins negative electrode sections 23 of laminated body 24 to each other. Negative electrode lead frame 26 and negative electrode sections 23 are joined to each other by a conductive adhesive (not shown).
Positive electrode lead frame 25 is jointed to the upper surface of positive electrode common terminal 27. Thin sections 27B are disposed at both ends of the width direction of positive electrode common terminal 27, respectively. The central part other than thin sections 27B serves as positive electrode terminal section 27A during mounting.
Negative electrode lead frame 26 is jointed to the upper surface of negative electrode common terminal 28. Negative electrode common terminal 28 also has thin section 28B in its central part of the width direction. Both ends other than thin section 28B serve as negative electrode terminal sections 28A during mounting.
Insulating covering resin 29 integrally covers laminated body 24, positive electrode lead frames 25, negative electrode lead frame 26, positive electrode common terminals 27, and negative electrode common terminal 28. Thin sections 27B and thin section 28B respectively disposed in positive electrode common terminals 27 and negative electrode common terminal 28 are also integrally covered with insulating covering resin 29. Positive electrode terminal sections 27A are exposed at two facing positions and negative electrode terminal sections 28A are exposed at two facing places on the lower surface as the mounting surface of the chip-type solid electrolytic capacitor. Thus, a four-terminal structure is formed.
In this conventional chip-type solid electrolytic capacitor, the above-mentioned four-terminal structure allows magnetic fluxes generated by the current flowing between respective terminals to cancel each other out. Therefore, the ESL can be significantly reduced. The ESL can be further reduced by minimizing the distances between the terminals to shorten the loop length of the current. Such a chip-type solid electrolytic capacitor is disclosed in Patent Literature 1, for example.
In the conventional chip-type solid electrolytic capacitor, negative electrode terminal sections 28A apparently take a two-terminal structure, but are actually one negative electrode terminal. Therefore, the equivalent circuit of the chip-type solid electrolytic capacitor becomes a circuit shown in FIG. 13A.
In this chip-type solid electrolytic capacitor, the direct-current component of applied current flows through the positive electrode side, and the high-frequency noise component included in the applied current flows through the negative electrode side and drops to the ground. The chip-type solid electrolytic capacitor is connected and used in this manner. However, two negative electrodes are interconnected as shown in FIG. 13B, so that the whole high-frequency noise component does not drop to the ground. As shown by arrows in FIG. 13B, the high-frequency noise component flows also to the other negative electrode terminal section side. Therefore, the high-frequency noise component is insufficiently removed and the impedance characteristic in the high-frequency region is not sufficient.
Patent Literature 1: Unexamined Japanese Patent Publication No. 2007-5760